{"title":"Breaking the power delivery wall using voltage stacking","authors":"K. Mazumdar, M. Stan","doi":"10.1145/2206781.2206795","DOIUrl":null,"url":null,"abstract":"We propose the use of voltage stacking for addressing some of the power delivery issues for many-core processors. To demonstrate the effectiveness of our method we first design a proxy for a many-core stacked processor in the form of a regular structure using multiple ring oscillators where we can control the voltage, frequency and switching activity for individual rings. For intermediate voltage rail regulation, we propose a push pull-based switched capacitor regulator designed specifically for balancing the stacked loads. Detailed Spice simulation results for the prototype model show a 4× reduction in supply current when using 4 layers of voltage stacking. We further validate our method by designing a voltage-stacked structure using two PIC cores.","PeriodicalId":272619,"journal":{"name":"ACM Great Lakes Symposium on VLSI","volume":"13 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2012-05-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"14","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"ACM Great Lakes Symposium on VLSI","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1145/2206781.2206795","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 14
Abstract
We propose the use of voltage stacking for addressing some of the power delivery issues for many-core processors. To demonstrate the effectiveness of our method we first design a proxy for a many-core stacked processor in the form of a regular structure using multiple ring oscillators where we can control the voltage, frequency and switching activity for individual rings. For intermediate voltage rail regulation, we propose a push pull-based switched capacitor regulator designed specifically for balancing the stacked loads. Detailed Spice simulation results for the prototype model show a 4× reduction in supply current when using 4 layers of voltage stacking. We further validate our method by designing a voltage-stacked structure using two PIC cores.