High frequency implementation of cryptographic hash function Keccak-512 on FPGA devices

Soufiane El Moumni, M. Fettach, A. Tragha
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引用次数: 2

Abstract

Cryptographic hash functions have an important role in numerous cryptographic mechanisms like computing digital signatures, checking data integrity, storing passwords and generating random numbers. Due to the cryptanalysis attacks on hash functions, NIST expressed its need to a new resistant hash function by announcing a public competition, this competition made Keccak hash function the new secure hash algorithm SHA-3. This new SHA-3 proved its strengths against recent attacks. However it has to be implemented efficiently in order to keep its resistance. In other words, an efficient FPGA design of hash functions is needed be it increasing frequency, minimising area consumption, or increasing throughput. In this paper we have focused on increasing frequency of the Keccak-512, and we have achieved 401.2 MHz as a maximum frequency, and 9.62 Gbps as a throughput. The proposed design has been implemented in Xilinx Virtex-5 and Virtex-6 FPGA devices and compared to existing FPGA implementations.
加密哈希函数Keccak-512在FPGA器件上的高频实现
密码学哈希函数在计算数字签名、检查数据完整性、存储密码和生成随机数等众多密码学机制中发挥着重要作用。由于对哈希函数的密码分析攻击,NIST通过宣布公开竞赛来表达对新的抗哈希函数的需求,这次竞赛使Keccak哈希函数成为新的安全哈希算法SHA-3。这种新的SHA-3证明了它对抗最近攻击的能力。然而,它必须有效地实施,以保持其阻力。换句话说,无论是增加频率、最小化面积消耗还是增加吞吐量,都需要高效的哈希函数FPGA设计。在本文中,我们专注于提高Keccak-512的频率,我们已经实现了401.2 MHz作为最大频率,9.62 Gbps作为吞吐量。提出的设计已经在Xilinx Virtex-5和Virtex-6 FPGA器件中实现,并与现有的FPGA实现进行了比较。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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