A 10-bit 20MHz 38mW 950MHz CT ΣΔ ADC with a 5-bit noise-shaping VCO-based quantizer and DEM circuit in 0.13u cmos

Abstract

A combined 5-bit, 1st order noise-shaped quantizer and DEM circuit running at 950MHz based on a multi-phase VCO is presented. This quantizer structure is the key element in a 3rd order noise shaped ADC with 2nd order loop dynamics and a single opamp. Measured performance is 60dB SNR at 20MHz bandwidth in 0.13u CMOS while consuming 32mA from a 1.2V supply.