An Approach to Ternary Logic gates using FinFET

Abstract

Ternary logic has been evolved from binary logic due to its many advantages as it is energy efficient, less complex and faster speed for serial transfer. Due to these technological advancements ternary circuits have attracted many researchers to implement ternary circuits. In digital system, NOT, NOR and NAND are of importance as they are the main building blocks of many complex arithmetic and logic circuits. In this paper, we discuss the basic ternary gates and some circuits implemented by using FinFET. An extensive simulation is performed for all the gates and circuits using Tspice Simulator. FinFET is being adapted instead of traditional MOSFET because of its captivity over the drawbacks occurred during narrowing to nanometer scale. Results obtained have expected functionality of each gate and circuits, additionally there is enhancement in performance parameters.