A novel automatic erase technique using an internal voltage generator for 1 Mbit flash EEPROM

Digest of Technical Papers., 1990 Symposium on VLSI Circuits Pub Date : 1990-06-07 DOI:10.1109/VLSIC.1990.111114

K. Shohji, T. Wada, K. Seki, T. Mutoh, T. Noda, Y. Kubota, T. Hagiwara, K. Shimohigashi

引用次数: 1

Abstract

An on-chip automatic erase technique using an internal voltage generator has been developed and has proved to operate well in 1-Mb-flash EEPROM. This technology permits accurate control of erasure and guarantees the performance after erasure of the true single-transistor-per-cell type of flash EEPROM. Device implementation is described

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一种基于内部电压发生器的1mbit闪存EEPROM自动擦除技术

一种采用内部电压发生器的片上自动擦除技术已经被开发出来，并被证明在1mb闪存EEPROM上运行良好。该技术允许精确控制擦除，并保证擦除后的性能，真正的单晶体管每单元类型的闪存EEPROM。描述了设备实现。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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来源期刊

Digest of Technical Papers., 1990 Symposium on VLSI Circuits

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