Invoice Code Recognition System Based on FPGA Acceleration

Shizhen Huang, Hongxuan Huang, Guowei Huang
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引用次数: 2

Abstract

Aiming at the problem of invoice code identification, this article focuses on the embedded system for identifying invoice codes. FPGA has the characteristics of large data throughput, flexible development, and high real-time performance in image processing. Therefore, based on the DE10- LITE development board, this article mounts an FPGA hardware accelerator in the ARM soft core. An invoice code identification system was built through the method of software and hardware collaborative design. The hardware realizes image data acquisition, preprocessing and other functions, and the software part realizes the function of projection segmentation and recognition. Meanwhile, the different coupling modes of accelerator in the heterogeneous system are compared with each other. The verification results on the hardware development platform show that the system could quickly and accurately identify the invoice code.
基于FPGA加速的发票码识别系统
针对发票码识别问题,本文重点研究了嵌入式发票码识别系统。FPGA在图像处理方面具有数据吞吐量大、开发灵活、实时性高等特点。因此,本文基于DE10- LITE开发板,在ARM软核上安装FPGA硬件加速器。采用软硬件协同设计的方法,构建了发票码识别系统。硬件部分实现图像数据采集、预处理等功能,软件部分实现投影分割和识别功能。同时,对异质体系中加速器的不同耦合方式进行了比较。在硬件开发平台上的验证结果表明,该系统能够快速准确地识别发票代码。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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