A low-voltage low-power 1.5 GHz CMOS LNA design

Proceedings of the 15th Biennial University/Government/ Industry Microelectronics Symposium (Cat. No.03CH37488) Pub Date : 2003-09-04 DOI:10.1109/UGIM.2003.1225760

Zhang-fa Liu, S. Parke

引用次数: 1

Abstract

A low-voltage and low-power 1.5 GHz low-noise amplifier in 0.18 /spl mu/m CMOS technology for GPS application is designed, this LNA has 28.7 dB gain with 0.2 dB noise figure from 1.0 V supply voltage. Basic noise analysis and design method are presented in this paper.

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一种低电压低功耗1.5 GHz CMOS LNA设计

采用0.18 /spl mu/m CMOS技术，设计了一种用于GPS应用的低电压低功耗1.5 GHz低噪声放大器，该放大器在1.0 V电源电压下具有28.7 dB增益和0.2 dB噪声系数。本文介绍了基本的噪声分析和设计方法。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Proceedings of the 15th Biennial University/Government/ Industry Microelectronics Symposium (Cat. No.03CH37488)

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