An Efficient Soft Error Detection in Multicore Processors Running Server Applications

Abstract

In this paper, a throughput-aware transient fault detection method is presented with respect to the features of server processors. The proposed method takes the advantages of combination of reconfigurable redundant execution-based fault detection and speculative fault detection. The reconfigurable redundant execution-based fault detection method by using configuration manager module couples two free adjacent cores on which a thread will be executed, and decouples them when resources are limited for normal execution. This method exploits unused resources in the multi-core processors to ensure high throughput reliable execution. The speculative fault detection method uses a history of block addresses requested form L1 cache to L2 cache during thread execution to find abnormal execution behavior. In order to evaluate the proposed method, the alpha processor model is utilized in the context of Gem5 simulator. The experimental results showed that 70% of injected faults can be detected with negligible hardware overhead.