Impact of DBI Feature on Peak Distortion Analysis of LPDDR5 at 6400Mbps

Abstract

This paper illustrates the signal integrity (SI) performance enhancement in an LPDDR5 system running at 6400 Mbps through the Data Bit Inversion (DBI) feature available in the controller. To demonstrate the abovementioned phenomenon, an SIPI co-simulation is performed to estimate the link performance. For SI, the eye margins for one byte and its corresponding DBI pin in an LPDDR5 channel are simulated. The eye margins are evaluated with and without DBI-compliant versions of the Peak Distortion Analysis (PDA) patterns and are statistically extrapolated to reflect a bit error rate (BER) of 10−16. Upon comparing BER-16 eye margins for the DBI-compliant bit patterns to the original patterns, a significant improvement is observed. The eye height shows 14.8% improvement and the eye width increases by 8.3%.