Hema Lata Rao Maddi, S. Nayak, V. Talesara, Yibo Xu, W. Lu, A. Agarwal
{"title":"Characterization of Near Conduction Band SiC/SiO2 Interface Traps in Commercial 4H-SiC Power MOSFETs","authors":"Hema Lata Rao Maddi, S. Nayak, V. Talesara, Yibo Xu, W. Lu, A. Agarwal","doi":"10.1109/WiPDA56483.2022.9955292","DOIUrl":null,"url":null,"abstract":"It is well known that the high density of interface traps (D<inf>it</inf>) near the conduction band (CB) edge limits the net inversion layer charge in the conduction band of a 4H-SiC/SiO<inf>2</inf> MOSFET in strong inversion. Measurements at cryogenic temperatures are necessary to study the presence of interface trap density (D<inf>it</inf>) up to the CB edge. In our study, we extracted the threshold voltage (V<inf>T</inf>) from cryogenic (10 K) to high temperature (500 K) and calculated the V<inf>T</inf> shift which is a measure of interface trapped negative charge (∆Q<inf>it</inf>). This shift in negative charge is used to estimate a relative magnitude of D<inf>it</inf> near the CB edge. The higher the value of ∆V<inf>T</inf>, the higher the D<inf>it</inf> for a given sample.","PeriodicalId":410411,"journal":{"name":"2022 IEEE 9th Workshop on Wide Bandgap Power Devices & Applications (WiPDA)","volume":"60 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2022-11-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2022 IEEE 9th Workshop on Wide Bandgap Power Devices & Applications (WiPDA)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/WiPDA56483.2022.9955292","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
It is well known that the high density of interface traps (Dit) near the conduction band (CB) edge limits the net inversion layer charge in the conduction band of a 4H-SiC/SiO2 MOSFET in strong inversion. Measurements at cryogenic temperatures are necessary to study the presence of interface trap density (Dit) up to the CB edge. In our study, we extracted the threshold voltage (VT) from cryogenic (10 K) to high temperature (500 K) and calculated the VT shift which is a measure of interface trapped negative charge (∆Qit). This shift in negative charge is used to estimate a relative magnitude of Dit near the CB edge. The higher the value of ∆VT, the higher the Dit for a given sample.