Mohamed Abdelkader, Ahmed M. A. Ali, A. Abdelaziz, M. Ismail, Mohamed Refky, Y. Ismail, H. Mostafa
{"title":"A 200MS/s, 8-bit Time-based Analog to Digital Converter (TADC) in 65nm CMOS technology","authors":"Mohamed Abdelkader, Ahmed M. A. Ali, A. Abdelaziz, M. Ismail, Mohamed Refky, Y. Ismail, H. Mostafa","doi":"10.1109/JEC-ECC.2016.7518960","DOIUrl":null,"url":null,"abstract":"Time-based-Analog-to-Digital-Converter (TADC) is an important block in various applications that require higher resolution and lower power consumption compared to the conventional ADCs at scaled CMOS technologies. In time-based ADCs, the input voltage is first converted into a pulse in time by using a Voltage-to-Time Converter (VTC) circuit, and then the pulse is converted to a digital output by using a Time-to-Digital Converter (TDC) circuit. In this paper, a TADC is proposed with a VTC that achieves high linearity and large dynamic input range and a TDC that achieves a time resolution of 3.9 ps. A 200MS/S, 8-bit TADC with effective number of bits (ENOB) equals 7.6 bits is proposed.","PeriodicalId":362288,"journal":{"name":"2016 Fourth International Japan-Egypt Conference on Electronics, Communications and Computers (JEC-ECC)","volume":"8 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2016-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 Fourth International Japan-Egypt Conference on Electronics, Communications and Computers (JEC-ECC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/JEC-ECC.2016.7518960","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 3
Abstract
Time-based-Analog-to-Digital-Converter (TADC) is an important block in various applications that require higher resolution and lower power consumption compared to the conventional ADCs at scaled CMOS technologies. In time-based ADCs, the input voltage is first converted into a pulse in time by using a Voltage-to-Time Converter (VTC) circuit, and then the pulse is converted to a digital output by using a Time-to-Digital Converter (TDC) circuit. In this paper, a TADC is proposed with a VTC that achieves high linearity and large dynamic input range and a TDC that achieves a time resolution of 3.9 ps. A 200MS/S, 8-bit TADC with effective number of bits (ENOB) equals 7.6 bits is proposed.