Design of Eight Bit Novel Reversible Arithmetic and Logic Unit

Abstract

Digital circuits made up of classical gates dissipate significant amount of energy as bits are erased during logic operations. Use of reversible logic gates to implement such circuits can significantly reduce the power consumed. This paper covers various aspects about reversible computing and reversible logic gates. Furthermore in this paper we have tried to design a reversible implementation of eight bit arithmetic and logic unit, optimal in terms of number of gates used and number of garbage outputs produced.