Comparison of light-load improvement techniques for low power buck converters

C. Feeney, M. Duffy
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引用次数: 2

Abstract

Recently a great deal of work has been done to improve the efficiency of DC-DC converters at light-load. This has been driven by the desire to increase battery life in portable devices and to reduce standby power consumption in mains powered devices. In general, power supplies are moving towards higher switching frequencies to reduce passive component size, resulting in higher switching and gate drive power loss. Several methods to reduce power loss at light-load including Pulse Frequency Modulation and Diode Emulation are investigated in this paper. These methods however result in higher inductor current ripple as the inductor is designed for operation when output current is at its maximum. Distributing inductors in parallel is shown to provide a means for increasing the effective inductance at light-load through reducing current ripple.
低功率降压变换器轻载改进技术的比较
近年来,为了提高DC-DC变换器在轻负载下的效率,人们做了大量的工作。这是由于希望增加便携式设备的电池寿命和减少电源供电设备的待机功耗。一般来说,电源正朝着更高的开关频率移动,以减少无源元件的尺寸,导致更高的开关和栅极驱动功率损耗。本文研究了降低轻载功率损耗的几种方法,包括脉冲调频和二极管仿真。然而,这些方法会导致电感电流纹波增大,因为电感设计为在输出电流达到最大值时工作。并联分布电感器可以通过减小电流纹波来增加轻载时的有效电感。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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