Instruction scheduling for reliability-aware compilation

Semeen Rehman, M. Shafique, J. Henkel
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引用次数: 43

Abstract

An instruction scheduling technique is presented that targets at improving the reliability of a software program given a user-provided tolerable performance overhead. A look-ahead-based heuristic schedules instructions by evaluating the reliability of dependent instructions while reducing the impact of spatial and temporal vulnerabilities of various processor components. Our reliability-driven instruction scheduler (implemented into the GCC compiler) provides on average a 22% reduction of program failures compared to state-of-the-art.
面向可靠性感知编译的指令调度
提出了一种指令调度技术,其目标是在用户提供可容忍的性能开销的情况下提高软件程序的可靠性。一种基于预判的启发式调度方法通过评估依赖指令的可靠性来调度指令,同时减少各种处理器组件的时空漏洞的影响。我们的可靠性驱动指令调度程序(在GCC编译器中实现)与最先进的程序相比,平均减少了22%的程序故障。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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