A design and verification environment for ELLA

Proceedings of ASP-DAC'95/CHDL'95/VLSI'95 with EDA Technofair Pub Date : 1995-08-29 DOI:10.1109/ASPDAC.1995.486387

H. Barringer, G. Gough, Brian Monahan, A. Williams, M. Arcus, A. Armstrong, M. Hill

引用次数: 4

Abstract

We describe a fully integrated design environment for the Hardware Description Language ELLA, which provides formal verification support to the hardware engineer. The environment includes both conventional hardware design tools, and special purpose tools for ELLA-level design transformation, symbolic simulation and formal verification. All tools operate from an underlying formal semantic representation of ELLA. The operation of the various tools is described from the user viewpoint via a simple design example.

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ELLA的设计和验证环境

我们为硬件描述语言ELLA描述了一个完全集成的设计环境，它为硬件工程师提供了正式的验证支持。该环境既包括传统的硬件设计工具，也包括用于ella级设计转换、符号仿真和形式化验证的专用工具。所有工具都从ELLA的底层形式化语义表示进行操作。通过一个简单的设计示例，从用户的角度描述了各种工具的操作。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Proceedings of ASP-DAC'95/CHDL'95/VLSI'95 with EDA Technofair

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