Design and implementation of a configurable hardware profiler supporting path profiling and sampling

Huizhen Zhang, J. Ji, Xuehai Zhou, Hongxing Ma, Chao Wang
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引用次数: 6

Abstract

Profiling plays an important role in performance optimization, such as instruction set optimization, dynamic binary translation and so on. Unfortunately, profilers nowadays often lack in efficiency on two key attributes: accuracy and profiling time. In this paper, we introduce a configurable hardware path profiler deriving from previous work, based on the idea of sampling and path profiling. The profiler consists of three modules respectively for identifying branches, detecting paths and storing information. It can work with different processors loosely. It utilizes dynamic path profiling technique on instruction level to accurately obtain sensitive hot information of executing programs while supports multiple sampling policies to reduce profiling overheads. Through configuration, the profiler can perform different profiling policies and profile target programs continuously or discretely. Empirical experiments show that the profiler can reduce hardware timing to 6.4% and keep the accuracy up to 90%.
设计和实现一个可配置的硬件分析器,支持路径分析和采样
性能分析在指令集优化、动态二进制转换等性能优化中起着重要的作用。不幸的是,现在的分析器经常在两个关键属性上缺乏效率:准确性和分析时间。在本文中,我们基于采样和路径剖析的思想,介绍了一种可配置的硬件路径剖析器。该分析器由三个模块组成,分别用于分支识别、路径检测和信息存储。它可以松散地与不同的处理器一起工作。它利用指令级动态路径剖析技术,准确获取执行程序的敏感热信息,同时支持多采样策略,减少剖析开销。通过配置,分析器可以连续或离散地执行不同的分析策略和分析目标程序。实验结果表明,该分析器可以将硬件时序降低到6.4%,并保持高达90%的准确率。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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