Verilator-based Fast Verification Methodology for BLE MAC Hardware

Eun-Gyeong Ham, Yujin Jeon, Jaeyun Lim, Ji-Hoon Kim
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引用次数: 0

Abstract

Following the market trend, fast and strict verification of hardware architecture is essential for saving cost and time of production. Recently, Verilator, an open-source Verilog simulator, is widely used due to its fast simulation time as well as easy-to-use property. In this paper, we present a fast verification methodology for BLE (Bluetooth Low Energy) MAC (Medium Access Control) hardware based on Verilator. Since C++-based modeling can be easily integrated into the Verilog-based hardware platform with Verilator, complex verification scenarios with various parameter configurations can be supported. Compared to the commercial Verilog simulator, our verification platform shows up to 5.94 times of improvement in terms of simulation time.
基于verilator的BLE MAC硬件快速验证方法
随着市场的发展趋势,快速严格的硬件架构验证对于节省成本和生产时间至关重要。最近,Verilator,一个开源的Verilog模拟器,由于其快速的仿真时间和易于使用的特性而被广泛使用。本文提出了一种基于Verilator的低功耗蓝牙(Bluetooth Low Energy) MAC (Medium Access Control)硬件的快速验证方法。由于基于c++的建模可以通过Verilator轻松地集成到基于verilog的硬件平台中,因此可以支持具有各种参数配置的复杂验证场景。与商用Verilog模拟器相比,我们的验证平台在仿真时间方面提高了5.94倍。
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