Scalable Shared-Memory Multiprocessing [Book Reviews]

Abstract

~ This book is primarily devoted to Dash (Directorykchitecture for Shared Memory), a multiprocessor system known from earlier publications (see “The Stanford Dash Multiprocessor,” Computer, Mar. 1992, Vol. 3 5 , No. 3 , pp. 63-79). The book also provides readers with a comprehensive view of modem multiprocessing, as it describes where the technology is actually heading. The major issue in multiprocessor architectures is communication: how multiple processors communicate with each other. Not so long ago, buses were the major component tying various computational pieces together. Multiple processors used a bus to access common memory or to communicate with separate memories, which caused a communication bottleneck. Strictly speaking, the problems started when users wanted to extend existing systems with several processors to much larger aggregates of dozens or even hundreds of processing units. In such cases, even hierarchically organized buses began to saturate, and designers faced a scalability barrier. Moving from a bus to a point-to-point network was an immediate solution, but then old problems persisted and new ones arose, such as cache coherence. One approach was to maintain shared memory (common address space) along the bus or across the network, without cache coherence. Another relied on message passing, but in both cases the memory latency problem emerged. Technological developments soon made possible widespread use of caches, and then other problems started. Maintaining cache coherence across the bus (let alone the entire network) is not trivial, and most designers lost their hair before coming up with satisfactory solutions. This book is a concentrated effort to address such problems and provide a solution to maintain cache coherence across the pointto-point network of multiple processors. The authors call it scalable shared-memory multiprocessing (SSMP). The book’s three parts are General Concepts, Experience with Dash, and Future Trends. The first is the most interesting. It is mainly a histarical perspective on multiprocessor systems. The book first discusses scalability problems in detail, concluding that hardware cache coherence is a key to high performance. T o ensure scalability, one must apply point-topoint interconnections (as opposed to a bus) and base cache coherence on directory schemes. Scalability has three dimensions: How does the performance scale? That is, what speedup (in terms of execution time) can we achieve by using Nprocessors over a single processor for the same problem? How does the cost scale when more processors are added? What is the largest number of processors for which multiprocessing rather than uniprocessing is still advantageous? That is, what is the range of scalability?