A second-order low-power ΔΣ modulator for pressure sensor applications

Tero Nieminen, K. Halonen
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引用次数: 2

Abstract

In this paper, an 1-bit second-order low-power ΔΣ modulator for pressure sensor applications is presented. The modulator utilizes correlated double-sampling (CDS) in order to reduce the flicker (1/f) noise. Due to the 1-bit output, the feedback DAC is inherently linear. The modulator is designed with 0.35-µm CMOS process. Measured signal-to-noise and distortion ratio (SNDR) is 86dB (14bits), while the current consumption is 14µA.
用于压力传感器应用的二阶低功率ΔΣ调制器
本文介绍了一种用于压力传感器的1位二阶低功耗ΔΣ调制器。该调制器利用相关双采样(CDS)来降低闪烁(1/f)噪声。由于1位输出,反馈DAC本质上是线性的。该调制器采用0.35µm CMOS工艺设计。测量的信噪比和失真比(SNDR)为86dB (14bits),电流消耗为14µA。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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