J. P. Guzman, C. Calvez, R. Pilard, F. Gianesello, M. Ney, D. Gloria, C. Person
{"title":"Silicon integrated dielectric resonator antenna solution for 60GHz front-end modules","authors":"J. P. Guzman, C. Calvez, R. Pilard, F. Gianesello, M. Ney, D. Gloria, C. Person","doi":"10.1109/SIRF.2012.6160131","DOIUrl":null,"url":null,"abstract":"A new dielectric resonator antenna (DRA) solution for the complete integration of radio front end at 60GHz is presented. The solution is a SoC configuration consisting of an integrated PA and a CPW fed slot on 65nm CMOS SOI (Silicon on Insulator) technology from ST Microelectronics. A co-design strategy is taken into consideration to reduce the size of the system and matching circuit losses. A total size of 1mm2 die has been achieved for both PA and Antenna excitation element. The antenna element as a whole is then taken from this SoC solution into a SiP configuration which can integrate the DR and silicon based elements, achieving a high gain (5dBi) and a bandwidth of 5GHz in the specified band.","PeriodicalId":339730,"journal":{"name":"2012 IEEE 12th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems","volume":"21 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2012-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"12","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2012 IEEE 12th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SIRF.2012.6160131","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 12
Abstract
A new dielectric resonator antenna (DRA) solution for the complete integration of radio front end at 60GHz is presented. The solution is a SoC configuration consisting of an integrated PA and a CPW fed slot on 65nm CMOS SOI (Silicon on Insulator) technology from ST Microelectronics. A co-design strategy is taken into consideration to reduce the size of the system and matching circuit losses. A total size of 1mm2 die has been achieved for both PA and Antenna excitation element. The antenna element as a whole is then taken from this SoC solution into a SiP configuration which can integrate the DR and silicon based elements, achieving a high gain (5dBi) and a bandwidth of 5GHz in the specified band.