A novel ROM architecture for reducing bubble and metastability errors in high speed flash ADCs

Abstract

In a flash ADC, output of the comparators constitute the thermometer code. This thermometer code is converted to binary code with the help of a thermometer to binary decoder using a ROM. However, this conversion scheme suffers from metastability and bubble errors. A novel ROM architecture has been proposed which suppresses metastability, both first and second order bubble errors. It eliminates the need of an error correction circuit in the front end of the ROM thereby reducing power consumption, area requirement and removing the delay associated with the additional stage. This architecture also eliminates the need of Gray coded ROM and Gray to binary converter thereby making the circuit simpler.