A generic architecture of complete intrinsic evolvable digital circuits

Peng Ke, Xin Nie, Zhichao Cao
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引用次数: 2

Abstract

Evolvable Hardware is inspired by natural evolution and based on Evolutionary algorithms, for automatic design of hardware systems. By exploring a large design search space, EHW may find solutions for a task, unsolvable, or more optimal than those found using traditional design methods. During evolution it is necessary to evaluate a large number of different circuits which is normally most efficiently undertaken in reconfigurable hardware. For digital circuits design, field programmable gate arrays are very applicable. Thus, this paper presents a generic virtual reconfigurable architecture for designing complete intrinsic evolvable digital circuits on FPGAs. The experimental results show that it is a promising approach towards autonomous and on-line reconfigurable machines capable of adapting to real-world problems.
完整的内在可演化数字电路的通用架构
可进化硬件受自然进化的启发,以进化算法为基础,用于硬件系统的自动设计。通过探索一个大的设计搜索空间,EHW可以找到一个任务的解决方案,无法解决的,或者比使用传统设计方法找到的更优化。在进化过程中,有必要评估大量不同的电路,这通常是在可重构硬件中最有效地进行的。对于数字电路设计,现场可编程门阵列是非常适用的。因此,本文提出了一种通用的虚拟可重构结构,用于fpga上设计完整的内在可进化数字电路。实验结果表明,这是一种很有前途的方法,可以实现能够适应现实问题的自主和在线可重构机器。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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