A new FPGA based architecture to improve performance of deflectometry image processing algorithm

Abstract

Image processing has gained its popularity over the recent years in areas, such as computer vision, artificial intelligence and automation. Deflectometry image processing technique is developed to inspect defects on reflecting surfaces. FPGA offers flexibility by employing reconfigurability, and furthermore, provides parallelization and pipelining to improve latency and execution time. The performance gain of deflectometry image processing algorithm in terms of execution times can be achieved by using an architecture based on FPGA, as proposed in this paper. The results show the correlation between performance and resource consumption. The simulation results are calculated and arranged in form of comparison between software and hardware implementation, using proposed architecture. Moreover, for the rapid prototyping purpose, Xilinx High Level Synthesis (HLS) tool is selected in the development methodology to realize the proposed design.