A cost/performance analysis of integrated-circuit core memories

Abstract

The purpose of this paper is to give added insight into the influence of memory organization on system cost and performance, to show how various configurations may be best suited to satisfying a particular set of requirements, and to indicate the effects of low-cost integrated circuitry on the storage array/circuit cost tradeoffs available with varying organizations. To accomplish these objectives, five typical organizations were selected, and each was dealt with in sufficient detail to allow subsequent predictions of cost and performance. Those chosen are applicable to random-access ferrite-core memories, and each design makes use of integrated circuitry to the extent permitted by the devices which presently may be procured in volume quantities.