Compact sub-1mW low phase noise CMOS LC-VCO based on power reduction technique

Abstract

A power-minimized LC voltage controlled oscillator (VCO) with switched biasing and triode-region MOSFETs has been designed using a 0.18-µm CMOS process. The design strategy for an LC VCO suggested an inductance selection scheme to accommodate the trade-off between power consumption and phase noise. Consuming a current of 680-µA from a 1.2 V power supply, the VCO achieves a measured single-sideband phase noise of −123.2 dBc/Hz at 1 MHz offset frequency and 8 % tuning range. The Figure-Of-Merit with the normalized area of the proposed VCO is −198.2 dB, which is the lowest among the latest state-of-the-art sub-1mW VCOs.