Power-performance versus algorithmic trade-offs in the implementation of wireless multimedia terminals

Abstract

Circuit design for wireless applications generally involves achieving a certain level of processing speed, dictated by the data transmission rate and algorithmic performance, while minimizing the energy dissipation. This paper discusses some of the circuit techniques that help to achieve this goal. We show that power reduction in a multimedia system involves trade-offs at the algorithmic, algebraic, architectural, and circuit levels of abstraction.