A Cost Effective Output Response Analyzer for \sum - \delta Modulation Based BIST Systems

Hao-Chiao Hong, Sheng-Chuan Liang
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引用次数: 3

Abstract

A cost effective output response analyzer (ORA) for Sigma-Delta modulation based BIST systems is presented. Instead of using fast Fourier transform (FFT) to derive the signal-to-noise-and-distortion ratio (SNDR) in frequency domain, the proposed ORA using the modified controlled sine wave fitting procedure to calculate the signal power and the total-harmonic-distortion-and-noise power in time domain separately. It requires neither parallel multiplier nor complex CPU/DSP and bulky memory thus has a low cost. A second-order design-for-digital-testability Sigma-Delta modulator is used as the circuit under test example. Simulation results show that the SNDR differences between conventional FFT analysis and the proposed ORA have a mean and standard deviation of 0.64 dB and 0.36 dB respectively. The cost effectiveness and satisfying accuracy features make it suitable for embedded BIST applications
性价比高的\sum - \delta调制型BIST系统输出响应分析仪
提出了一种基于Sigma-Delta调制的BIST系统的低成本输出响应分析仪(ORA)。采用改进的可控正弦波拟合方法分别计算信号功率和时域总谐波失真和噪声功率,而不是使用快速傅里叶变换(FFT)在频域计算信噪比(SNDR)。它既不需要并行乘法器,也不需要复杂的CPU/DSP和庞大的内存,因此成本低。采用二阶数字可测性设计的σ - δ调制器作为测试例电路。仿真结果表明,传统FFT分析与所提出的ORA的SNDR差异均值为0.64 dB,标准差为0.36 dB。成本效益和令人满意的精度特点使其适合嵌入式BIST应用
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