On the chip implementation of analogic algorithms for optical detection of some layout errors of printed circuit boards

Abstract

Printed circuit board layout inspection methods are mostly based on local geometric information, therefore they are well suited to the cellular neural networks (CNN) paradigm. The wire break, the wire and isolation width violation and an "H" type short circuits detector analogic algorithms were tested on a 20*22 CNN Universal Machine (CNNUM) chip working in the CNN Chip Prototyping System (CCPS) and on the CNN Engine Board (CNNEB), and the results were compared to the commercially available inspection systems.