{"title":"Novel Perspective Approach to Improve Performance of Nanowire TFET","authors":"Ritwik Sharma, D. Yadav, Sachin Kumar, Nitish Parmar, Somya Saraswat, Atul Kumar","doi":"10.1109/SCEECS48394.2020.113","DOIUrl":null,"url":null,"abstract":"A Nanowire TFET device employing a Dual Metal Gate along with a combination of lower energy band gap III- V material for the source and Doping Pockets around the SC- junction to boost On-current is proposed. Gaussian Doping is exploited on the Drain side suppressing the ambi-polar and off-state currents. The proposed device (DMG DP GaSb-Si NWTFET) is judged against a vanilla Silicon Nanowire TFET (Si- NWTFET). Both these TFET devices are analyzed for their DC and Analog Characteristics. The modified device exhibits a much superior ON-current, OFF-current and Subthreshold Slope (SS) along with improvements in trans-conductance (gm), parasitic capacitance, Cutoff frequency (fT), transmit time (td) and the Gain-Bandwidth Product. The improved device is optimized for gate metal workfunctions and Pocket Doping Concentrations. The device is proposed as a suitable replacement to CMOS for low power applications.","PeriodicalId":167175,"journal":{"name":"2020 IEEE International Students' Conference on Electrical,Electronics and Computer Science (SCEECS)","volume":"3 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2020-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2020 IEEE International Students' Conference on Electrical,Electronics and Computer Science (SCEECS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SCEECS48394.2020.113","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
A Nanowire TFET device employing a Dual Metal Gate along with a combination of lower energy band gap III- V material for the source and Doping Pockets around the SC- junction to boost On-current is proposed. Gaussian Doping is exploited on the Drain side suppressing the ambi-polar and off-state currents. The proposed device (DMG DP GaSb-Si NWTFET) is judged against a vanilla Silicon Nanowire TFET (Si- NWTFET). Both these TFET devices are analyzed for their DC and Analog Characteristics. The modified device exhibits a much superior ON-current, OFF-current and Subthreshold Slope (SS) along with improvements in trans-conductance (gm), parasitic capacitance, Cutoff frequency (fT), transmit time (td) and the Gain-Bandwidth Product. The improved device is optimized for gate metal workfunctions and Pocket Doping Concentrations. The device is proposed as a suitable replacement to CMOS for low power applications.