Design of High Speed 8-Bit Magnitude Comparator for Security Application

Shubham Munratiwar, Y. Saikrishna, V. Jyothi
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Abstract

A comparator is a digital or electronic circuit which is used to compare the given two inputs to give the result (greater than or lesser than or equal). This is widely used to compare the voltages and current in electrical as well as electronic circuits. This project proposed a design of 8-bit comparator which compares 8 bits of two binary data. This 8bit comparator is slightly different from conventional comparators, which can be built with two 4 bit comparators using XNOR gates or by neglecting the logic for greater or lower output; that result in reduction of gates and area. The simulations of the comparator can be done using Verilog code in Xilinx tool and analyzing its performance for various inputs in the same way a security password circuit and the cascading circuit are design as a application using proposed 8-Bit comparator.
用于安全应用的高速8位幅度比较器设计
比较器是一种数字或电子电路,用于比较给定的两个输入以给出结果(大于或小于或等于)。这被广泛用于比较电气和电子电路中的电压和电流。本课题提出了一种8位比较器的设计,它可以对两个二进制数据的8位进行比较。这个8位比较器与传统的比较器略有不同,传统的比较器可以用两个4位比较器使用XNOR门或通过忽略输出或输出更低的逻辑来构建;这就减少了闸门和面积。在Xilinx工具中使用Verilog代码对比较器进行仿真,并分析其在不同输入下的性能,与使用所提出的8位比较器设计安全密码电路和级联电路的应用程序相同。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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