A low-power digital to analog converter for SAR ADCs using one reference voltage

Seyed Behnam Yazdani, Ata Khorami, M. Sharifkhani
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引用次数: 2

Abstract

A new low-power capacitive structure and its switching scheme for Successive Approximation Register (SAR) Digital to Analog Converter (DAC) is presented. The proposed method reduces power consumption by 93% and area by 50% compared to the conventional binary-weighted DAC. Moreover, only one reference voltage is used to avoid the effect of common mode voltage (Vcm) non-idealities on precision.
一个低功耗的数字到模拟转换器的SAR adc使用一个参考电压
提出了一种用于逐次逼近寄存器(SAR)数模转换器(DAC)的新型低功耗电容结构及其开关方案。与传统的二值加权DAC相比,该方法可降低93%的功耗和50%的面积。此外,仅使用一个参考电压,避免了共模电压(Vcm)非理想性对精度的影响。
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