Low-voltage high-performance switched current memory cell

Proceedings. Tenth Annual IEEE International ASIC Conference and Exhibit (Cat. No.97TH8334) Pub Date : 1997-09-07 DOI:10.1109/ASIC.1997.616969

A. Handkiewicz, P. Sniatala, M. Lukowiak

引用次数: 12

Abstract

A new switched current (SI) memory cell is proposed in the paper. Analysis and simulations show very good properties of the cell. Layout of a sample and hold (SH) circuit composed of the memory cell is also presented. This SH circuit is a basic cell of bilinear integrators and delay lines, being components of one- and two-dimensional SI filters. The method and tools for automated design of such filters are briefly described.

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低电压高性能开关电流存储单元

本文提出了一种新的开关电流存储单元。分析和仿真结果表明，该电池具有良好的性能。并给出了由存储单元组成的采样保持电路的版图。该SH电路是双线性积分器和延迟线的基本单元，是一维和二维SI滤波器的组成部分。简要介绍了这种滤波器自动化设计的方法和工具。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Proceedings. Tenth Annual IEEE International ASIC Conference and Exhibit (Cat. No.97TH8334)

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