A low-power low-IF DDPSK receiver in 0.35-/spl mu/m SOI CMOS technology

Abstract

A low-power low-IF double differential PSK receiver is implemented in a 0.35-/spl mu/m silicon on insulator (SOI) CMOS technology. Low-power front-end allows the implementation of the receiver with minimal power consumption. The receiver operates at 435 MHz RF. RF front-end and baseband measurements show that a fully-integrated low-power low-IF receiver that tolerates large Doppler shift is feasible.