Parallel replacement mechanism for multithread

Guangzuo Cui, Mingzeng Hu, Xiaoming Li
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Abstract

This paper presents a new rapid thread replacement mechanism which is important in multithread technology. Analysis to the memory system indicates that the memory utilization decreases with the increase of cache hit ratio. The parallelism between thread computation and thread replacement is found by analyzing their working processes. Based on these, we advance a rapid multithread replacement mechanism which overlaps the thread replacement with thread computation. More especially, with finite hardware contexts, this mechanism can play the same role of infinite contexts by tolerating the replacement overhead. By modifying the general thread switching model, we build the thread replacement model and evaluate this mechanism in theory and experiment methods. At last, we discuss the hardware implementation and put forward the problems to be resolved in the future.
多线程并行替换机制
本文提出了一种新的快速线程替换机制,该机制在多线程技术中具有重要意义。对内存系统的分析表明,随着缓存命中率的增加,内存利用率降低。通过分析线程计算和线程替换的工作过程,发现了它们之间的并行性。在此基础上,提出了一种将线程替换与线程计算相结合的快速多线程替换机制。更具体地说,对于有限的硬件上下文,这种机制可以通过容忍替换开销来发挥无限上下文的相同作用。通过对常规线程交换模型的修正,建立了线程替换模型,并从理论和实验两方面对其机理进行了评价。最后,对系统的硬件实现进行了讨论,并提出了今后需要解决的问题。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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