Hardware Architecture and Implementation of Clustered Tensor Approximation for Multi-Dimensional Visual Data

Abstract

Tensor approximation has been proven to be an efficient and flexible dimensionality reduction method. However, for applications which require rapid image rendering, the computational cost of data reconstruction after applying tensor approximation is still high. As a result, several modified tensor approximation algorithms supporting fast reconstruction have been proposed, where clustered tensor approximation (CTA) is one of those which are often mentioned. In this paper, we design a hardware accelerator for CTA. The processor can handle a tensor of size $12\mathrm{S}\times 12\mathrm{S}\times 12\mathrm{S}\times 12\mathrm{S}$. With parallel processing techniques, the performance of the processor can achieve a $ 9.41\times $ speed-up when compared to the software.