A. Lim, R.T.-P. Lee, Xin Peng Wang, W. Hwang, C. Tung, D. Lai, G. Samudra, D. Kwong, Y. Yeo
{"title":"Band edge NMOS work function for nickel fully-silicided (FUSI) gate obtained by the insertion of novel Y-, Tb-, and Yb-based interlayers","authors":"A. Lim, R.T.-P. Lee, Xin Peng Wang, W. Hwang, C. Tung, D. Lai, G. Samudra, D. Kwong, Y. Yeo","doi":"10.1109/ESSDERC.2007.4430916","DOIUrl":null,"url":null,"abstract":"Nickel fully-silicided (FUSI) gate work function Phin, was successfully tuned for the first time by the insertion of novel yttrium-(Y) based, terbium-(Tb) based, or ytterbium-(Yb) based interlayer at the gate/dielectric interface. Band edge Ni-FUSI gate Phim, (4.01 -4.11 eV) were obtained in a gate-first process flow (950 or 1000degC anneal) by an inserted ultra-thin (~1 nm) interlayer on SiO2 dielectric. We further demonstrate that gate-first implementation of the interlayers in a NiSi/HfO2 gate stack can realize a low Phim, of ~4.28 eV without dopant incorporation or Ni-alloying. In addition, NiSi Phim, modulation between Si midgap and band edge could be achieved by varying the interlayer thickness or M-silicide phase.","PeriodicalId":103959,"journal":{"name":"ESSDERC 2007 - 37th European Solid State Device Research Conference","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2007-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"ESSDERC 2007 - 37th European Solid State Device Research Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ESSDERC.2007.4430916","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
Nickel fully-silicided (FUSI) gate work function Phin, was successfully tuned for the first time by the insertion of novel yttrium-(Y) based, terbium-(Tb) based, or ytterbium-(Yb) based interlayer at the gate/dielectric interface. Band edge Ni-FUSI gate Phim, (4.01 -4.11 eV) were obtained in a gate-first process flow (950 or 1000degC anneal) by an inserted ultra-thin (~1 nm) interlayer on SiO2 dielectric. We further demonstrate that gate-first implementation of the interlayers in a NiSi/HfO2 gate stack can realize a low Phim, of ~4.28 eV without dopant incorporation or Ni-alloying. In addition, NiSi Phim, modulation between Si midgap and band edge could be achieved by varying the interlayer thickness or M-silicide phase.