What does ultra low power requirements mean for side-channel secure cryptography?

Abstract

The design of low power and side-channel-attack resistant encryption engine is a key challenge to enhance security of resource-constrained platforms. This paper present case studies to show that the low-power requirement is a challenge as well as an opportunity for improving side-channel resistance. On one hand, low-power encryption architecture can be more vulnerable to power-attack; and the countermeasures comes with significant overhead. However, on the other hand, low-power circuit techniques such as integrated voltage regulation or adaptive clocking can also be exploited to improve power-attack resistance. The analysis shows the need for future research on low-power and side-channel secure cryptography.