Kazuyoshi Suzuki, Mamoru Shimizu, Toshihiko Kashiyama, E. Fujiwara
{"title":"A class of error control codes for M-spotty byte errors occurred in a limited number of bytes","authors":"Kazuyoshi Suzuki, Mamoru Shimizu, Toshihiko Kashiyama, E. Fujiwara","doi":"10.1109/ISIT.2005.1523718","DOIUrl":null,"url":null,"abstract":"Spotty byte error control codes are very effective for correcting/ detecting errors in semiconductor memory systems using recent high-density RAM chips with wide I/O data, e.g., 8, 16, or 32 bits I/O data. A spotty byte error is defined as random t-bit errors within a byte of length b-bit, where t les b, and also m-spotty byte errors as multiple spotty byte errors in a byte. In semiconductor memory systems, in general, errors are occurred in a limited number of RAM chips, that is, occurred in a limited number of bytes. Considering this situation, this paper presents a new class of m-spotty byte error control codes where errors are confined to a limited number of bytes. The proposed codes require much smaller check-bit length than the conventional m-spotty byte error control codes and the RS codes. And also, this paper clarifies a decoding algorithm of the proposed codes","PeriodicalId":166130,"journal":{"name":"Proceedings. International Symposium on Information Theory, 2005. ISIT 2005.","volume":"138 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2005-10-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings. International Symposium on Information Theory, 2005. ISIT 2005.","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISIT.2005.1523718","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 4
Abstract
Spotty byte error control codes are very effective for correcting/ detecting errors in semiconductor memory systems using recent high-density RAM chips with wide I/O data, e.g., 8, 16, or 32 bits I/O data. A spotty byte error is defined as random t-bit errors within a byte of length b-bit, where t les b, and also m-spotty byte errors as multiple spotty byte errors in a byte. In semiconductor memory systems, in general, errors are occurred in a limited number of RAM chips, that is, occurred in a limited number of bytes. Considering this situation, this paper presents a new class of m-spotty byte error control codes where errors are confined to a limited number of bytes. The proposed codes require much smaller check-bit length than the conventional m-spotty byte error control codes and the RS codes. And also, this paper clarifies a decoding algorithm of the proposed codes