A Design Methodology based upon Symbolic Layout and Integrated CAD Tools

A. M. Beyls, B. Hennion, J. Lecourvoisier, G. Mazaré, A. Puissochet
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引用次数: 12

Abstract

This paper describes one of the new methodologies for IC design currently being used at the CNET. The main features detailed are the symbolic layout method called MDMOS and the integrated CAD system CASSIOPEE. Its most significant advantages are design safety, elimination of costly and inefficient checks and supply of technical specifications which are always up-to-date. This methodology is described in its entirety starting from the logical description, and including all stages up to masks generation.
基于符号布局和集成CAD工具的设计方法
本文介绍了目前在CNET使用的集成电路设计的一种新方法。主要特点是符号布局方法MDMOS和集成CAD系统CASSIOPEE。它最显著的优点是设计安全,消除了昂贵和低效的检查,并提供始终最新的技术规范。该方法从逻辑描述开始完整描述,并包括所有阶段直至掩模生成。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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