Meeting the test challenges of the 1 Gbps parallel RapidIO/spl reg/ interface with new automatic test equipment capabilities

Abstract

This paper describes an approach to testing the 1 Gbps Parallel RapidIO/spl reg/ interface specifications. The unique test requirements for this bus require the application of new test techniques as well as new ATE capabilities. ATE performance attributes important for parallel source-synchronous buses will be identified and presented with methods to measure these attributes.