Sub-micron, metal gate, high-к dielectric, implant-free, enhancement-mode III-V mosfets

D. Moran, R. Hill, X. Li, H. Zhou, D. Mclntyre, S. Thoms, R. Droopad, P. Zurcher, K. Rajagopalan, J. Abrokwah, M. Passlack, I. Thayne
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引用次数: 7

Abstract

The performance of 300 nm, 500 nm and 1 mum metal gate, implant free, enhancement mode III-V MOSFETs are reported. Devices are realised using a 10 nm MBE grown Ga2O3/(GaxGd1-x)2O3 high-kappa (kappa=20) dielectric stack grown upon a delta-doped AlGaAs/InGaAs/AlGaAs/GaAs heterostructure. Enhancement mode operation is maintained across the three reported gate lengths with a reduction in threshold voltage from 0.26 V to 0.08 V as the gate dimension is reduced from 1 mum to 300 nm. An increase in transconductance is also observed with reduced gate dimension. Maximum drain current of 420 muA/mum and extrinsic transconductance of 400 muS/mum are obtained from these devices. Gate leakage current of less than 100 pA and subthreshold slope of 90 mV/decade were obtained for all gate lengths. These are believed to be the highest performance sub-micron enhancement mode III-V MOSFETs reported to date.
亚微米,金属栅极,高介电常数,无植入,增强模式III-V型mosfet
报道了300 nm、500 nm和1 μ m金属栅、无植入物、增强模式III-V型mosfet的性能。器件采用在δ掺杂AlGaAs/InGaAs/AlGaAs/GaAs异质结构上生长的10 nm MBE生长的Ga2O3/(GaxGd1-x)2O3高kappa (kappa=20)介电层来实现。当栅极尺寸从1微米减小到300纳米时,在三个栅极长度上保持增强模式操作,阈值电压从0.26 V降低到0.08 V。随着栅极尺寸的减小,也观察到跨导率的增加。这些器件的最大漏极电流为420 μ a /mum,外部跨导为400 μ a /mum。在所有栅极长度下,栅极泄漏电流均小于100 pA,亚阈值斜率为90 mV/ 10年。这些被认为是迄今为止报道的性能最高的亚微米增强模式III-V mosfet。
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