Power analysis of asynchronous design using charge recycling and push-pull level converter

Abstract

An asynchronous charge-recycling (ACR) scheme with a push-pull level converter (PPLC) receiver is proposed. In ACR_PPLC, ACR reduces the dynamic power consumption by reusing the charge, and PPLC limits short circuit current (IS) in the receiver buffer. The simulation shows that ACR_PPLC scheme consumes 20% less power than the normal inverter driver (ID) with the inverter receiver (IR), and ACR with IR. The proposed ACR_PPLC is very effective to apply the charge recycling scheme to the asynchronous design for a low power application.