A low-power 435-MHz SOI CMOS LNA and mixer

Abstract

A low-power 435-MHz single-ended low-noise amplifier and a double-balanced mixer was implemented in a 0.35-/spl mu/m Silicon On Insulator (SOI) CMOS process. The single-ended LNA has a measured noise figure of 2.91 dB, and the mixer has an input third-order intercept point of +20 dBm. Total power dissipation of the LNA and mixer is 24 mW from a 2.5-V supply. This is the first LNA-mixer pair implemented at 435 MHz using an SOI CMOS process.