A time-delay digital tanlock loop

Abstract

A digital tanlock loop (DTL) that utilises a constant time-delay unit instead of the constant 90/spl deg/ phase-shifter is proposed to reduce the complexity of implementation and rid the circuit of the practical problems, approximations and limitations caused by the 90/spl deg/ phase-shifter. The time-delay digital tanlock loop (TDTL) preserves the most important features of the conventional DTL (CDTL) and introduces improvement over the first-order CDTL under suitable choice of the circuit parameters.