A Partitioning Technique of General Combinational Circuit Into a Tree Type Circuit

Abstract

This paper examines the impacts of different types of circuit partitioning on reducing the computational complexity for test generation problem which usually grows exponentially with the number of input lines in the given circuit. It will be shown that decomposing a general combinational circuit into its modules (supergates) such that these modules constitute the basic elements of a tree circuit (network) considerably reduces the computational complexity of the testing problem. Toward this goal, a partition algorithm is developed. This algorithm partitions a given circuit into maximal supergates whenever this is possible. Its computational complexity depends linearly on the number of lines and gates of the circuit.