Fast Montgomery modular multiplication by pipelined CSA architecture

Abstract

Montgomery modular multiplication algorithm is commonly used in implementations of the RSA cryptosystem or other cryptosystems based on modular arithmetic. There are several architectures for speed up its calculations. In this paper, we use carry save adder (CSA) architecture and pipeline it to increase its performance. We show that this architecture has greater performance for FPGA design than other architectures. Hence, it is appropriate for RSA processors based on FPGAs.