A review of low-noise amplifiers for neural applications

J. Ruiz-Amaya, A. Rodríguez-Pérez, M. Delgado-Restituto
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引用次数: 8

Abstract

This paper presents a comparative study of three low-noise amplifiers for neural recording applications. The topologies are thoroughly analysed in terms of area, power consumption and noise performance. Further, the theoretical results are confirmed by simulations of transistor-level implementations in a 0.13µm CMOS technology at 1.2V supply voltage.
神经系统低噪声放大器的研究进展
本文对三种用于神经记录的低噪声放大器进行了比较研究。拓扑结构在面积,功耗和噪声性能方面进行了彻底的分析。此外,在1.2V电源电压下,在0.13 μ m CMOS技术上的晶体管级实现仿真验证了理论结果。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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