Instruction buffering exploration for low energy VLIWs with instruction clusters

Abstract

For multimedia applications, loop buffering is an efficient mechanism to reduce the power in the instruction memory of embedded processors. In particular, sofrwcre controlled clustered loop buffers are energy efficient. However current compilers for VLIW do not fully exploit the potentials offered by such a clustered organization This paper presents an algorithm to explore what is the optimal loop huffer configuration and the optimal way to use this configuration for an application or a set of applications. Results for the MediaBeneh application suite show an additional 18% reduction (on average) in energy in the instruction memory hierarchy as compared to traditional nonclustered approaches to the loop huffer without compromising performance.