A scalable low power imager architecture for compound-eye vision sensors

F. Boussaïd, Shoushun Chen, A. Bermak
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引用次数: 2

Abstract

In this paper, we propose a scalable low power imager architecture for compound-eye vision sensors. The proposed hardware architecture is based on a time domain data representation as well as a biologically inspired read-out strategy using address-event-representation (AER). The proposed AER approach to compound-eye imaging enables low power operation (10nA/pixel), efficient read-out, improved signal-to-noise ratio together with wide dynamic range. Moreover, the proposed AER-based VLSI architecture is scalable and well suited to the next generation of deep submicron silicon processes owing to decreased supply voltage, process variability and increased noise levels.
一种用于复眼视觉传感器的可扩展低功耗成像仪架构
本文提出了一种可扩展的低功耗复眼视觉传感器成像仪架构。所提出的硬件架构基于时域数据表示以及使用地址-事件表示(AER)的生物启发读出策略。提出的AER复眼成像方法具有低功耗(10nA/像素)、高效读出、提高信噪比和宽动态范围等优点。此外,所提出的基于aer的VLSI架构具有可扩展性,并且由于降低了电源电压,工艺可变性和增加了噪声水平,因此非常适合下一代深亚微米硅工艺。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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