Improving the Noise Performance of ROIC Interface Circuit

Abstract

Interface circuit plays a crucial role in architecture of read out integrated circuits (ROIC), which are also responsible for the transformation of small current through a photodiode into a voltage. In this work, we have chosen a Gate Modulation Input (GMI) interface circuit of ROIC for analysis purpose. The noise performance is improved in the GMI circuit by applying the classical approach and increasing the gate area. Cadence Virtuso is used for validating proposed concepts at 180nm technology node.